1. Field of the Invention
This invention relates to a display adopting system-on-panel (SOP) design, and more particularly to a liquid crystal display (LCD) adopting SOP design capable of synchronizing control signals.
2. Description of Related Art
Liquid crystal displays (LCDs) with the advantages of slim size, low power consumption, and low radiation showing the potential to replace traditional cathode ray tube (CRT) displays are widely applied to electronic products such as desktop computer, personal digital assistant (PDA), notebook (NB), digital camera (DC), cell phone, etc. nowadays.
FIG. 1 is a block diagram showing a traditional active matrix LCD 1. The LCD 1 comprises a display panel 10 and a driving system 20. A pixel array 12 with a plurality of pixel capacitors 122 is formed on the display panel 10. Each of the pixel capacitors 122 is connected with a thin film transistor (TFT) 124. The TFT 124 is utilized as a switch to control the illumination of the pixel capacitor 122. The driving system 20 includes a control circuit 22, a source driver 24, and a scan driver 26. The source driver 24 is electrically connected to the source electrodes of the TFTs 124. The scan driver 26 is electrically connected to the gate electrodes of the TFTs 124. The control circuit 22 is utilized for translating the original displaying signals DS into display data D and control signals CS. The display data D and the control signals CS are applied to the source driver 24 and the scan driver 26 to generate source driving voltages Vs and gate driving voltages Vg. The source driving voltages Vs and the gate driving voltages Vg are then applied to the source electrodes and the gate electrodes of the TFTs 124 through the data lines 32 and the scan lines 34 respectively to form images on the display panel 10.
As shown, the TFTs 124 connected to the pixel capacitors 122 for switching the pixel capacitors 122 are arrayed on the display panel 10. In the past, restricted by the temperature limit of the glass substrate composing the display panel 10, only the amorphous thin film transistor (a-TFT) adopting an amorphous silicon layer specified with low temperature fabrication processes is able to be used to prevent the deformation of the display panel 10.
By contrast to the TFT 124 for switching the pixel capacitors 122, the transistor within the driving system 20 dealing with complicated display data needs a higher switching rate for a sufficiently high calculation speed, and the proper choice is polysilicon TFT. However, the polysilicon TFT cannot be fabricated on the glass substrate through the traditional semiconductor processes. The glass substrate cannot tolerate. Therefore, in a case shown in FIG. 2, the driving system 20 is fabricated on several silicon chips rather than on the display panel 10. The silicon chips are electrically connected to the pixel array 12 on the display panel 10 through some pipelines.
As the development of advance low temperature polysilicon (LTPS) process such as laser crystallization, the formation of polysilicon TFT on the glass-based display panel becomes possible. In the case shown in FIG. 3, by using the LTPS process, the source driver 24 and the scan driver 26 may be formed on the display panel 10 to simplify the fabrication process and reduce the weight of the LCD.
The case of FIG. 3 still has a silicon chip for allocating control circuit 22, and some assembling steps for electrically connecting the control circuit 22 to the driver 24, 26 on the display panel 10 through some pipelines are demanded. For further reducing the weight of the LCD, in the case shown in FIG. 4, the control circuit 22 is integrated on the display panel 10 to result a system-on-panel (SOP) display.
The signals applied to the source driver 24 and the scan driver 26 must have perfect synchronization to make sure the pixel array 12 displays images correctly. However, in the SOP display shown in FIG. 4, the control circuit 22 cannot lean to the source driver 24 and the scan driver 26 simultaneously due to the width limitation of the frame region in the display panel 10. Therefore, a large signal transmitting distance between the control circuit 22 and the drivers 24, 26 is unpreventable and may result a significant timing delay or signal mismatch to degrade the image quality.
Accordingly, how to make sure a good synchronization of all the signals applied to the drives is quite important for a correct and good image quality especially for a display adopting SOP design.